74LVQ373SJ Просмотр технического описания (PDF) - Fairchild Semiconductor

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74LVQ373SJ

Low Voltage Octal Transparent Latch with 3-STATE Outputs

Fairchild Semiconductor 

Functional Description

The LVQ373 contains eight D-type latches with 3-STATE

standard outputs. When the Latch Enable (LE) input is

HIGH, data on the Dn inputs enters the latches. In this con-

dition the latches are transparent, i.e., a latch output will

change state each time its D-type input changes. When LE

is LOW, the latches store the information that was present

on the D-type inputs a setup time preceding the

Logic Diagram

HIGH-to-LOW transition of LE. The 3-STATE standard out-

puts are controlled by the Output Enable (OE) input. When

OE is LOW, the standard outputs are in the 2-state mode.

When OE is HIGH, the standard outputs are in the high

impedance mode but this does not interfere with entering

new data into the latches.

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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