Nexperia
74LVC1G32
Single 2-input OR gate
13. Abbreviations
Table 11. Abbreviations
Acronym
CMOS
DUT
ESD
HBM
MM
TTL
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
Transistor-Transistor Logic
14. Revision history
Table 12. Revision history
Document ID
74LVC1G32 v.12
Modifications:
74LVC1G32 v.11
Modifications:
74LVC1G32 v.10
Modifications:
74LVC1G32 v.9
Modifications:
74LVC1G32 v.8
Modifications:
74LVC1G32 v.7
74LVC1G32 v.6
74LVC1G32 v.5
74LVC1G32 v.4
74LVC1G32 v.3
74LVC1G32 v.2
74LVC1G32 v.1
Release date Data sheet status
20180817
Product data sheet
Change notice Supersedes
-
74LVC1G32 v.11
• The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
20161202
Product data sheet
-
74LVC1G32 v.10
• Table 7: The maximum limits for leakage current and supply current have changed.
20120904
Product data sheet
-
74LVC1G32 v.9
• Package outline drawing of SOT1226 (Fig. 16) modified.
20120412
Product data sheet
-
74LVC1G32 v.8
• Added type number 74LVC1G32GX (SOT1226)
• Package outline drawing of SOT886 (Fig. 12) modified.
20111206
Product data sheet
-
74LVC1G32 v.7
• Legal pages updated.
20101020
Product data sheet
-
74LVC1G32 v.6
20070802
Product data sheet
-
74LVC1G32 v.5
20060619
Product data sheet
-
74LVC1G32 v.4
20040915
Product specification
-
74LVC1G32 v.3
20021115
Product specification
-
74LVC1G32 v.2
20020521
Product specification
-
74LVC1G32 v.1
20001121
Product specification
-
-
74LVC1G32
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 17 August 2018
© Nexperia B.V. 2018. All rights reserved
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