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74HC191 Просмотр технического описания (PDF) - Philips Electronics

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74HC191 Datasheet PDF : 14 Pages
First Prev 11 12 13 14
Philips Semiconductors
Presettable synchronous 4-bit binary
up/down counter
Product specification
74HC/HCT191
The shaded areas indicate when the input is
permitted to change for predictable output
performance.
(1) HC : VM = 50%; VI = GND to VCC.
HCT : VM = 1.3 V; VI = GND to 3 V.
Fig.16 Waveforms showing the set-up and hold times from the parallel load input (PL) to the data input (Dn).
The shaded areas indicate when the input is
permitted to change for predictable output
performance.
(1) HC : VM = 50%; VI = GND to VCC.
HCT : VM = 1.3 V; VI = GND to 3 V.
Fig.17 Waveforms showing the set-up and hold times from the count enable and up/down inputs (CE, U/D) to the
clock (CP).
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
14

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