100328DC Просмотр технического описания (PDF) - Fairchild Semiconductor

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100328DC

Low Power Octal ECL/TTL Bi-Directional Translator with Latch

Fairchild Semiconductor 

Test Circuitry (TTL-to-ECL)

Note:

• Rt = 50Ω termination. When an input or output is being monitored by a scope, Rt is supplied by the scope's 50Ω resistance. When an input or output is not

being monitored, an external 50Ω resistance must be applied to serve as Rt.

• TTL and ECL force signals are brought to the DUT via 50Ω coax lines.

• VTTL is decoupled to ground with 0.1 µF to ground, VEE is decoupled to ground with 0.01 µF and VCC is connected to ground.

• For ECL input pins, the equivalent force/sense circuitry is optional.

FIGURE 1. TTL-to-ECL AC Test Circuit

Switching Waveforms (TTL-to-ECL)

FIGURE 2. TTL to ECL Transition—Propagation Delay and Transition Times

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