AD5425
R3
20kΩ
VDD
R2
R5
20kΩ
VREF
±10V
VDD
RFB
IOUT1
R1
VREF
AD5425
IOUT2
SYNC SCLK SDIN GND
MICROCONTROLLER
C1
AA1 1
AGND
R4
10kΩ
A2
VOUT = –VREF
TO +VREF
NOTES:
1. R1 AND R2 ARE USED ONLY IF GAIN ADJUSTMENT IS REQUIRED. ADJUST R1 FOR
VOUT = 0 V WITH CODE 10000000 LOADED TO DAC.
2. MATCHING AND TRACKING IS ESSENTIAL FOR RESISTOR PAIRS R3 AND R4.
3. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED IF A1/A2 IS A HIGH
SPEED AMPLIFIER.
Bipolar Operation
Figure 31. Bipolar Operation (4-Quadrant Multiplication)
Stability
In some applications, it may be necessary to generate full 4-
quadrant multiplying operation or a bipolar output swing. This
can be easily accomplished by using another external amplifier
and some external resistors, as shown in Figure 31. In this
circuit, the second amplifier, A2, provides a gain of 2. Biasing
the external amplifier with an offset from the reference voltage,
results in full 4-quadrant multiplying operation. The transfer
function of this circuit shows that both negative and positive
output voltages are created as the input data, D, is incremented
from code zero (VOUT = −VREF) to midscale (VOUT = 0 V ) to full
scale (VOUT = +VREF).
( ) VOUT = VREF × D /2n−1 −VREF
Where D is the fractional representation of the digital word
loaded to the DAC and n is the resolution of the DAC.
In the I-to-V configuration, the IOUT of the DAC and the
inverting node of the op amp must be connected as closely as
possible and proper PCB layout techniques must be employed.
Since every code change corresponds to a step function, gain
peaking can occur if the op amp has limited GBP and there is
excessive parasitic capacitance at the inverting node. This
parasitic capacitance introduces a pole into the open-loop
response, which can cause ringing or instability in closed-loop
applications.
An optional compensation capacitor, C1, can be added in
parallel with RFB for stability, as shown in Figure 30 and Figure
31. Too small a value of C1 can produce ringing at
the output, while too large a value can adversely affect the
settling time. C1 should be found empirically, but 1 pF to
2 pF is generally adequate for compensation.
When VIN is an ac signal, the circuit performs 4-quadrant
multiplication.
Table 6 shows the relationship between digital code and the
expected output voltage for bipolar operation.
Table 6. Bipolar Code Table
Digital Input
Analog Output (V)
1111 1111
+VREF (127/128)
1000 0000
0
0000 0001
−VREF (127/128)
0000 0000
−VREF (128/128)
Rev. A | Page 15 of 28