HY27SS08561M-TP Просмотр технического описания (PDF) - Hynix Semiconductor

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HY27SS08561M-TP

256Mbit (32Mx8bit / 16Mx16bit) NAND Flash Memory

Hynix Semiconductor 

HY27SS(08/16)561M Series

HY27US(08/16)561M Series

256Mbit (32Mx8bit / 16Mx16bit) NAND Flash

Note: 1. A0-A7 is the address in the Spare Memory area, where A0-A3 are valid and A4-A7 are don't care.

2. Only address cycle 4 is required.

CLE

CE

WE

ALE

RE

I/O

RB

tWHALL

tWHBH

tBHRL

tALLRL2

50h

Add. M

cycle 1

Add. M

cycle 2

Add. M

cycle 3

Data M

Data

Last

Command

Code

Address M Input

Busy

Data Output from M to

Last Byte or Word in Area C

Figure 28. Read C Operation, One Page AC Waveform

Rev 0.7 / Oct. 2004

34

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