Philips Semiconductors
74ALVT16240
16-bit inverting buffer/driver; 3-state
VI
negative
pulse
0V
90 %
VI
positive
pulse
0V
10 %
tW
VM
10 %
tTHL(tf)
tTLH(tr)
90 %
VM
tW
a. Input pulse definition
90 %
VM
tTLH(tr)
tTHL(tf)
VM
10 %
001aac221
VCC
VI
PULSE
GENERATOR
VO
DUT
RT
VEXT
RL
CL
RL
mna616
Test data is given in Table 10.
Definitions test circuit:
RL = Load resistor.
CL = Load capacitance includes jig and probe capacitance.
RT = Termination resistance should be equal to Zo of the pulse generator.
VEXT = Test voltage for switching times.
b. Test circuit
Fig 6. Load circuitry for switching times
Table 10: Test data
Input
VI
3.0 V or VCC
whichever is
less
Load
VEXT
fi
tW
tr, tf
CL
RL
tPHZ, tPZH tPLZ, tPZL
tPLH, tPHL
≤ 10 MHz 500 ns ≤ 2.5 ns 50 pF 500 Ω GND
6 V or 2 × VCC open
9397 750 15192
Product data sheet
Rev. 03 — 4 July 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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