256Mb: x4, x8, x16 SDRAM
SELF REFRESH Operation
Figure 53: Self Refresh Mode
T0
CLK
tCK
T1
tCH
T2
tCL
tCKS
((
))
((
))
CKE
tCKS tCKH
tCMS tCMH
Command PRECHARGE
NOP
DQM
((
))
((
AUTO
))
REFRESH
((
))
((
))
((
))
Tn + 1
( ( To + 1
))
((
))
((
))
((
))
((
NOP
))
((
))
((
))
((
))
To + 2
AUTO
REFRESH
Address
A10
BA0, BA1
All banks
Single bank
tAS tAH
Bank(s)
((
((
))
))
((
((
))
))
((
((
))
))
((
((
))
))
((
((
))
))
((
((
))
))
DQ High-Z
Precharge all
active banks
((
tRP
))
Enter self refresh mode
((
))
tXSR
Exit self refresh mode
(Restart refresh time base)
CLK stable prior to exiting
self refresh mode
Don’t Care
Note: 1. Each AUTO REFRESH command performs a REFRESH cycle. Back-to-back commands are
not required.
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. S 12/12 EN
82
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