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MAX4704EGC

Low-Voltage, 60Ω, 4:1 Analog Multiplexer in QFN

Maxim Integrated 

Low-Voltage, 60Ω,

4:1 Analog Multiplexer in QFN

PIN

µMAX

QFN-EP

10

1

—

2, 8

1

3

2

4

3

5

4

6

5

7

6

9

7

10

8

11

9

12

—

—

Pin Description

NAME

V+

N.C.

NO2

NO3

NO1

INH

GND

ADDB

ADDA

NO0

COM

EP

FUNCTION

Positive Supply Voltage

No Connection. Not internally connected.

Analog Switch 2. Normally open.

Analog Switch 3. Normally open.

Analog Switch 1. Normally open.

Inhibit. Connect to GND for normal operation. Connect to logic-level high to turn all

switches off.

Ground

Address Decoder Selection B

Address Decoder Selection A

Analog Switch 0. Normally open.

Analog Switch Common Terminal

Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize

thermal performance; not intended as an electrical connection point (QFN package only).

Detailed Description

The MAX4704 low-voltage, 4-channel analog multiplexer

operates from a single +1.8V to +5.5V supply. When

powered from a +2.7V supply, the device has a 60Ω

(max) on-resistance (RON), with 3Ω (max) RON matching

and 5Ω (max) RON flatness. The digital logic inputs are

+1.8V-logic compatible from a +2.7V to +3.3V supply.

Applications Information

Digital Control Inputs

The MAX4704 logic inputs are +1.8V CMOS logic compati-

ble for 3V operation and TTL compatible for 5V operation of

V+. Driving ADD_ rail-to-rail minimizes power consumption.

Analog Signal Levels

Analog signals that range over the entire supply volt-

age (V+ to GND) are passed with very little change in

on-resistance (see Typical Operating Characteristics).

The switches are bidirectional, so the NO_ and COM

pins can be either inputs or outputs.

(D1) as shown in Figure 1. If the analog signal can dip

below GND, add D2. Adding protection diodes reduces

the analog range to a diode drop (about 0.7V) below V+

(for D1), and a diode drop above ground (for D2).

On-resistance increases slightly at low supply voltages.

Maximum supply voltage (V+) must not exceed +6V.

Adding protection diode D2 causes the logic threshold

to be shifted relative to GND. TTL compatibility is not

guaranteed when D2 is added.

Protection diodes D1 and D2 also protect against some

overvoltage situations. In the circuit in Figure 1, if the

supply voltage is below the absolute maximum rating,

and if a fault voltage up to the absolute maximum rating

is applied to an analog signal pin, no damage will result.

POSITIVE SUPPLY

D1

V+

MAX4704

Power-Supply Sequencing and

Overvoltage Protection

Caution: Do not exceed the absolute maximum rat-

ings because stresses beyond those listed may

cause permanent damage to devices.

Proper power-supply sequencing is recommended for all

CMOS devices. Always apply V+ before applying analog

signals, especially if the analog signal is not current limited.

If this sequencing is not possible, and if the analog inputs

are not current limited to <20mA, add a small-signal diode

NO

COM

Vg

GND

D2

Figure 1. Overvoltage Protection Using Two External Blocking

Diodes

_______________________________________________________________________________________ 7

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