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AXA010A0X3-SRZ Просмотр технического описания (PDF) - Unspecified

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AXA010A0X3-SRZ Datasheet PDF : 20 Pages
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Data Sheet
April 8, 2008
12V Austin LynxTM SMT Non-isolated Power Modules Programmable:
10 – 14Vdc input; 0.75Vdc to 5.5Vdc Output; 10A output current
Test Configurations
TO OSCILLOSCOPE
LTEST
1μH
CURRENT PROBE
VIN(+)
CS 1000μF
Electrolytic
E.S.R.<0.1Ω
@ 20°C 100kHz
CIN
2x100μF
Tantalum
COM
NOTE: Measure input reflected ripple current with a simulated
source inductance (LTEST) of 1μH. Capacitor CS offsets
possible battery impedance. Measure current as shown
above.
Figure 23. Input Reflected Ripple Current Test Setup.
VO (+)
COM
COPPER STRIP
1uF .
10uF
SCOPE
RESISTIVE
LOAD
GROUND PLANE
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
Figure 24. Output Ripple and Noise Test Setup.
Rdistribution Rcontact
VIN(+)
VO
Rcontact Rdistribution
VIN
VO
RLOAD
Rdistribution Rcontact
COM COM
Rcontact Rdistribution
Design Considerations
Input Filtering
The 12V Austin Lynx Programmable SMT module should
be connected to a low ac-impedance source. A highly
inductive source can affect the stability of the module. An
input capacitance must be placed directly adjacent to the
input pin of the module, to minimize input ripple voltage
and ensure module stability.
In a typical application, 4x47 µF low-ESR tantalum
capacitors (AVX part #: TPSE476M025R0100, 47µF 25V
100 mESR tantalum capacitor) will be sufficient to
provide adequate ripple voltage at the input of the
module. To minimize ripple voltage at the input, low
ESR ceramic capacitors are recommended at the input of
the module. Figure 26 shows input ripple voltage (mVp-
p) for various outputs with 4x47 µF tantalum capacitors
and with 4x22 µF ceramic capacitor (TDK part #:
C4532X5R1C226M) at full load.
300
2 50
200
150
10 0
Tantalum
50
Ceramic
0
0
1
2
3
4
5
6
Output Voltage (Vdc)
Figure 26. Input ripple voltage for various output
with 4x22 µF polymer and 4x47 µF ceramic capacitors
at the input (full load).
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
Figure 25. Output Voltage and Efficiency Test Setup.
Efficiency η =
VO. IO
VIN. IIN
x 100 %
LINEAGE POWER
10

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