Philips Semiconductors
I2C-bus controlled economic BTSC stereo
decoder and audio processor
Product specification
TDA9853H
CHARACTERISTICS
All voltages are measured relative to GND; VCC = 8 V; Rs = 600 Ω; AC-coupled; RL = 10 kΩ; CL = 2.5 nF; fmod = 1 kHz
mono signal; composite input voltage 250 mV (RMS) for 100% modulation L + R (25 kHz deviation); pilot 50 mV (RMS);
Gv = 0 dB; linear tone control; AVL off; Tamb = 25 °C; see Fig.1; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Supplies
VCC
supply voltage
ICC
supply current
Vref
internal reference voltage at
pin Vref
Input stage
7.8
8
25
33
0.45VCC 0.5VCC
9
V
45
mA
0.55VCC V
Vi(max)(rms) maximum input voltage
(RMS value)
2
−
−
V
Zi
input impedance
20
25
32
kΩ
Stereo decoder
HR
headroom for L + R, L and R fmod = 300 Hz; THD < 15%
9
−
Vpil(rms)
nominal stereo pilot voltage
(RMS value)
−
50
−
dB
−
mV
Vth(on)(rms) pilot threshold voltage, stereo
on (RMS value)
−
−
35
mV
Vth(off)(rms) pilot threshold voltage, stereo
off (RMS value)
15
−
−
mV
hys
hysteresis
−
2.5
−
dB
Vo(rms)
output voltage (RMS value) 100% modulation L + R;
−
500
−
mV
fmod = 300 Hz
αcs(L,R)
stereo channel separation
14% modulation; fL = 300 Hz; 15
20
L and R
fR = 3 kHz
−
dB
THDL,R
total harmonic distortion
100% modulation L or R;
−
0.2
1
%
L and R
fmod = 1 kHz
S/N
signal-to-noise ratio at line
mono via I2C-bus; referenced
output and AF output
to 500 mV output signal
CCIR 468-2 weighted;
50
60
quasi peak
−
dB
DIN noise weighting filter −
73
(RMS value)
−
dBA
αmute
mute attenuation at LOL, LOR, 100% modulation L + R;
63
−
VAL and VAR
fmod = 300 Hz; mute via bit E6
−
dB
Stereo decoder, oscillator (VCXO); note 1
fo
nominal VCXO output
with nominal ceramic
frequency (32fH)
resonator
∆ffr
spread of free-running
with nominal ceramic
frequency
resonator
−
503.5
−
kHz
500
−
507
kHz
∆fcr
capture range frequency
nominal pilot
±190 ±265
−
Hz
2000 Dec 11
9