IDT72264L20G Просмотр технического описания (PDF) - Integrated Device Technology

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IDT72264L20G

VARIABLE WIDTH SUPERSYNC™ FIFO 8,192 x 18 or 16,384 x 9 16,384 x 18 or 32,768 x 9

Integrated Device Technology 

IDT72264/72274 VARIABLE WIDTH SUPERSYNC FIFO™

(8192 x 18 or 16384 x 9) and (16384 x 18 or 32768 x 9)

WCLK

tDS

D0 - Dn

tENS

WEN

RCLK

EF

DATA WRITE 1

tENH

tFWL1(1)

tREF

REN

COMMERCIAL TEMPERATURE RANGES

tDS

tENS

DATA WRITE 2

tENH

tREF

(1)

tFWL1

tREF

OE

LOW

tA

Q0 - Qn

DATA IN OUTPUT REGISTER

NOTES:

1. tFWL1 max. (in ns) = 10*Tf + 2*TRCLK

Where Tf is either the RCLK or the WCLK period, whichever is shorter, and TRCLK is the period.

2. LD = HIGH

Figure 10. Empty Flag Timing (IDT Standard Mode)

WORD 1

3218 drw 13

21

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