SL74HCT10N Просмотр технического описания (PDF) - System Logic Semiconductor

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SL74HCT10N

Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL74HCT10

AC ELECTRICAL CHARACTERISTICS(VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=6.0 ns)

Symbol

Parameter

tPLH, tPHL

tTLH, tTHL

CIN

Maximum Propagation Delay, Input A,B or C to

Output Y (Figures 1 and 2)

Maximum Output Transition Time, Any Output

(Figures 1 and 2)

Maximum Input Capacitance

Guaranteed Limit

25 °C to ≤85°C ≤125°C Unit

-55°C

19

24

29

ns

15

19

22

ns

10

10

10

pF

Power Dissipation Capacitance (Per Gate)

CPD Used to determine the no-load dynamic power

consumption:

PD=CPDVCC2f+ICCVCC

Typical @25°C,VCC=5.0 V

27

pF

Figure 1. Switching Waveforms

Figure 2. Test Circuit

EXPANDED LOGIC DIAGRAM

(1/3 of the Device)

SLS

System Logic

Semiconductor

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