AD7840ARS Просмотр технического описания (PDF) - Analog Devices

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AD7840ARS

LC2MOS Complete 14-Bit DAC

Analog Devices 

AD7840

AD7840–TMS32020 Serial Interface

Figure 22 shows a serial interface between the AD7840 and the

TMS32020 DSP processor. In this interface, the CLKX and

FSX pin of the TMS32020 are generated from the clock/timer

circuitry. The same clock/timer circuitry generates the LDAC

signal of the AD7840 to synchronize the update of the output

with the serial transmission. The FSX pin of the TMS32020

must be configured as an input.

Data from the TMS32020 is valid on the falling edge of CLKX.

Once again, the FORMAT pin of the AD7840 must be tied to

+5 V while the JUSTIFY pin must be tied to DGND.

APPLYING THE AD7840

Good printed circuit board layout is as important as the overall

circuit design itself in achieving high speed converter perfor-

mance. The AD7840 works on an LSB size of 366 µV. There-

fore, the designer must be conscious of minimizing noise in both

the converter itself and in the surrounding circuitry. Switching

mode power supplies are not recommended as the switching

spikes can feed through to the on-chip amplifier. Other causes

of concern are ground loops and digital feedthrough from mi-

croprocessors. These are factors which influence any high per-

formance converter, and a proper PCB layout which minimizes

these effects is essential for best performance.

LAYOUT HINTS

Ensure that the layout for the printed circuit board has the digi-

tal and analog lines separated as much as possible. Take care

not to run any digital track alongside an analog signal track. Es-

tablish a single point analog ground (star ground) separate from

the logic system ground. Place this star ground as close as pos-

sible to the AD7840 as shown in Figure 24. Connect all analog

grounds to this star ground and also connect the AD7840

DGND pin to this ground. Do not connect any other digital

grounds to this analog ground point.

Figure 22. AD7840–TMS32020 Serial Interface

AD7840–NEC7720 Serial Interface

A serial interface between the AD7840 and the NEC7720 is

shown in Figure 23. The serial clock must be inverted before

being applied to the AD7840 SCLK input because data from

the processor is valid on the rising edge of SCK.

The NEC7720 is programmed for the LSB to be the first bit in

the serial data stream. Therefore, the AD7840 is set up with the

FORMAT pin tied to DGND and the JUSTIFY pin tied to +5 V.

Figure 24. Power Supply Grounding Practice

Low impedance analog and digital power supply common re-

turns are essential to low noise operation of high performance

converters. Therefore, the foil width for these tracks should be

kept as wide as possible. The use of ground planes minimizes

impedance paths and also guards the analog circuitry from digi-

tal noise. The circuit layouts of Figures 27 and 28 have both

analog and digital ground planes which are kept separated and

only joined at the star ground close to the AD7840.

NOISE

Keep the signal leads on the VOUT signal and the signal return

leads to AGND as short as possible to minimize noise coupling.

In applications where this is not possible, use a shielded cable

between the DAC output and its destination. Reduce the

ground circuit impedance as much as possible since any poten-

tial difference in grounds between the DAC and its destination

device appears as an error voltage in series with the DAC output.

Figure 23. AD7840–NEC7720 Serial Interface

–12–

REV. B

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