CD40102BMS Просмотр технического описания (PDF) - Intersil
Номер в каталоге
Компоненты Описание
производитель
CD40102BMS Datasheet PDF : 13 Pages
| |||
CD40102BMS, CD40103BMS
Q
CI
CI
CI
Q
CL
CL
SPE
SPE
J
CLR
APE
DS Q
CL
CL
Q
R
TO GATING
TO GATING
CLR
FIGURE 11. DETAIL LOGIC DIAGRAM FOR FLIP-FLOPS, FF0 - FF7, USED IN
LOGIC DIAGRAMS FOR CD40102BMS AND CD40103BMS
CLK
CLR
CI/CE
SPE
APE
J0
J1
J2
J3
J4
J5
J6
J7
CO/ZD
CD40102BMS COUNT
CD40103BMS COUNT
99 98 3
255 254 3
2 1 0 99 98 98 97 8
2 1 0 255 254 254 253 8
7
6 5 4 99 98 97 96
7
6 5 4 255 254 253 252
FIGURE 12. TIMING DIAGRAM FOR CD40102BMS AND CD40103BMS
7-1304
Share Link: 