T8533 Просмотр технического описания (PDF) - Agere -> LSI Corporation

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T8533

Quad Programmable Line Card Signal Processor

Agere -> LSI Corporation 

Preliminary Data Sheet

July 2001

T8533/34 Quad Programmable Line Card

Signal Processor

Functional Description (continued)

The Control Interface (continued)

Read Command (continued)

CS

DCLK

COMMAND

01

7

START

ADDRESS

COMMAND FRAME

LENGTH

WAIT ≥ 1.5 µs

01

7

01

7

DATA

01

7

DI

01

7

01

7

01

7

D0

01

7

0073

Notes:

Data field length of 1 shown.

CK1 through CK8 are additional DCLK pulses required to properly process the data.

CK7 and CK8 are not necessary if another command frame follows this sequence.

Figure 14. Read Operation, Byte-by-Byte Mode (Gapped DCLK)

Agere Systems Inc.

19

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