Edge818
TEST AND MEASUREMENT PRODUCTS
Application Information
Power Supply Decoupling
VCC and VEE should be decoupled to GND with a .1 µF
chip capacitor in parallel with a .001 µF chip capacitor. A
VCC and VEE plane, or at least a solid power bus, is
recommended for optimal performance.
VH and VL Decoupling
As the VH and VL inputs are unbuffered and supply the
driver output current, which can be quite large during edge
transitions, decoupling capacitors for these inputs are
recommended in proportion to the amount of output
current requirements.
The power sequence below can be used as a guideline
when operating the Edge818:
Power-on Sequencing
1. VCC (substrate)
2. VEE
3. I/O Pins
Power-off Sequencing
1. I/O Pins
2. VEE
3. VCC
The three diode configuration shown in Figure 3 should
be used on a once-per-board basis.
VCC
For applications where VH and VL are shared over multiple
channels, a solid power plane to distribute these levels is
preferred.
VBB
The two VBB pins are connected together on-chip.
Therefore, only one VBB needs to be connected to for
proper 818 operation.
External
Logic
VDD
Supply
External
System
Ground
1N5820 or
Equivalent
The two pins may be used to daisy chain a VBB signal
across a PC Board without having to route the actual signal
VEE
underneath the 818.
Power Supplies
The Edge818 has several power supply requirements to
protect the part in power supply fault situations, as well
as during power up and power down sequences.
The following power supply requirements must be satisfied
at all times:
VEE ≤ All I/O pins ≤ VCC at all times.
Figure 3.
Power Supply Protection Scheme
gure 5.
Warning: It is extremely important that the voltage
on any device pin does not exceed the range of VEE
–0.5V to VCC +0.5V at any time, either during power
up, normal operation, or during power down. Failure
to adhere to this requirement could result in latchup
of the device, which could be destructive if the system
power supplies are capable of supplying large
amounts of current. Even if the device is not
immediately destroyed, the cumulative damage
caused by the stress of repeated latchup may affect
device reliability.
2004 Semtech Corp. / Rev. 5, 8/18/04
6
www .semtech.com