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SUB70N06-14(1998_01) Datasheet - Vishay Semiconductors

SUB70N06-14 image

Part Name
SUB70N06-14

Other PDF
  1998_02   lastest PDF  

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page
3 Pages

File Size
198.1 kB

MFG CO.
Vishay
Vishay Semiconductors Vishay

DESCRIPTION
The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model schematic is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0-to-5V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage.

CHARACTERISTICS
• N-Channel Vertical DMOS
• Macro Model (Model Subcircuit Schematic)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the −55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics

Page Link's: 1  2  3 
 

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