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SST89V516RD2-33-C-NI Datasheet - Silicon Storage Technology

89E516RD2_04 image

Part Name
SST89V516RD2-33-C-NI

Description

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91 Pages

File Size
881.3 kB

MFG CO.
SST
Silicon Storage Technology SST

PRODUCT DESCRIPTION
The SST89E5xxRD2 and SST89V5xxRD2 are members of the FlashFlex51 family of 8-bit microcontroller products designed and manufactured with SST’s patented and proprietary SuperFlash CMOS semiconductor process technology. The split-gate cell design and thick-oxide tunneling injector offer significant cost and reliability benefits for SST’s customers. The devices use the 8051 instruction set and are pin-for-pin compatible with standard 8051 microcontroller devices.
The devices come with 16/24/40/72 KByte of on-chip flash EEPROM program memory which is partitioned into 2 independent program memory blocks. The primary Block 0 occupies 8/16/32/64 KByte of internal program memory space and the secondary Block 1 occupies 8 KByte of internal program memory space.
The 8-KByte secondary block can be mapped to the lowest location of the 8/16/32/64 KByte address space; it can also be hidden from the program counter and used as an independent EEPROM-like data memory.
In addition to the 16/24/40/72 KByte of EEPROM program memory on-chip, the devices can address up to 64 KByte of external program memory. In addition to 1024 x8 bits of on-chip RAM, up to 64 KByte of external RAM can be addressed.


FEATURES:
• 8-bit 8051-Compatible Microcontroller (MCU)
   with Embedded SuperFlash Memory
   – Fully Software Compatible
   – Development Toolset Compatible
   – Pin-For-Pin Package Compatible
• SST89E5xxRD2 Operation
   – 0 to 40 MHz at 5V
• SST89V5xxRD2 Operation
   – 0 to 33 MHz at 3V
• 1 KByte Internal RAM
• Dual Block SuperFlash EEPROM
   – 8/16/32/64 KByte primary block +
      8 KByte secondary block
      (128-Byte sector size for both blocks)
   – Individual Block Security Lock with SoftLock
   – Concurrent Operation during
      In-Application Programming (IAP)
   – Memory Overlay for Interrupt Support during IAP
• Support External Address Range up to 64
   KByte of Program and Data Memory
• Three High-Current Drive Ports (16 mA each)
• Three 16-bit Timers/Counters
• Full-Duplex, Enhanced UART
   – Framing Error Detection
   – Automatic Address Recognition
• Ten Interrupt Sources at 4 Priority Levels
   – Four External Interrupt Inputs
• Programmable Watchdog Timer (WDT)
• Programmable Counter Array (PCA)
• Four 8-bit I/O Ports (32 I/O Pins) and
   One 4-bit Port
• Second DPTR register
• Low EMI Mode (Inhibit ALE)
• SPI Serial Interface
• Standard 12 Clocks per cycle, the device has an
   option to double the speed to 6 clocks per cycle.
• TTL- and CMOS-Compatible Logic Levels
• Brown-out Detection
• Low Power Modes
   – Power-down Mode with External Interrupt Wake-up
   – Idle Mode
• Temperature Ranges:
   – Commercial (0°C to +70°C)
   – Industrial (-40°C to +85°C)
• Packages Available
   – 44-lead PLCC
   – 40-pin PDIP (Port 4 feature not available)
   – 44-lead TQFP

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