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NJM555(2003) Datasheet - Japan Radio Corporation

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Part Name
NJM555

Description

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6 Pages

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170.9 kB

MFG CO.
JRC
Japan Radio Corporation  JRC

■ GENERAL DESCRIPTION
The NJM555 monolithic timing circuit is a highly stable controller capable of producing accruate time delays or oscillation. In the time delay mode, delay time is precisely controlled by only two external parts : a resistor and a capacitor. For operation as an oscillator, both the free running frequency and the duty cycle are accurately controlled by two external resistors and a capacitor.
Terminals are provided for triggering and resetting. The circuit will trigger and reset on falling waveforms. The output can source or sink up to 200mA or drive TTL circuits.

■ FEATURES
● Operating Voltage                (4.5V to 16V)
● Less Number of External Components
● Package Outline                  DIP8, DMP8, SSOP8, SIP8
● Bipolar Technology

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