DESCRIPTION
The M54/74HC40102/40103 are high speed CMOS 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while main taining the CMOS low power dissipation.
The HC40102, and HC40103 consist of an 8-stage synchronous down counter with a single output which is active when the internal count is zero. The HC40102 is configured as two cascaded 4-bit BCD counters, and the HC40103 contains a single 8-bit binary counter. Each type has control inputs for en abling or disabling the clock, for clearing the counter to its maximum count, and for presetting the counter either synchronously or asynchronously.

■ HIGH SPEED
   fMAX = 40 MHz (TYP.) at VCC = 5 V
■ LOW POWER DISSIPATION
   ICC = 4 µA (MAX.) at TA = 25 °C
■ HIGH NOISE IMMUNITY
   VNIH = VNIL = 28 % VCC (MIN.)
■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS
■ SYMMETRICAL OUTPUT IMPEDANCE
   |IOH| = IOL = 4 mA (MIN.)
■ BALANCED PROPAGATION DELAYS
   PLH = tPHL
■ WIDE OPERATING VOLTAGE RANGE
   VCC (OPR) = 2 V to 6 V
■ PIN AND FUNCTION COMPATIBLE WITH 40102B/40103B