Overview
The ATmega64A is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega64A achieves throughputs approaching 1 MIPS per MHz, allowing the system designer to optimize power consumption versus processing speed.

FEATUREs
• High-performance, Low-power Atmel® AVR® 8-bit Microcontroller
• Advanced RISC Architecture
   – 130 Powerful Instructions – Most Single Clock Cycle Execution
   – 32 x 8 General Purpose Working Registers + Peripheral Control Registers
   – Fully Static Operation
   – Up to 16 MIPS Throughput at 16 MHz
   – On-chip 2-cycle Multiplier
• High Endurance Non-volatile Memory segments
   – 64 Kbytes of In-System Reprogrammable Flash program memory
   – 2 Kbytes EEPROM
   – 4 Kbytes Internal SRAM
   – Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
   – Data retention: 20 years at 85°C/100 years at 25°C(1)
   – Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
   – Up to 64 Kbytes Optional External Memory Space
   – Programming Lock for Software Security
   – SPI Interface for In-System Programming
• JTAG (IEEE std. 1149.1 Compliant) Interface
   – Boundary-scan Capabilities According to the JTAG Standard
   – Extensive On-chip Debug Support
   – Programming Flash, EEPROM, Fuses,
      and Lock Bits through the JTAG Interface
• Peripheral Features
   – Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
   – Two Expanded 16-bit Timer/Counters
      with Separate Prescaler, Compare Mode, and Capture Mode
   – Real Time Counter with Separate Oscillator
   – Two 8-bit PWM Channels
   – 6 PWM Channels with Programmable Resolution from 1 to 16 Bits
   – 8-channel, 10-bit ADC
• 8 Single-ended Channels
• 7 Differential Channels
• 2 Differential Channels with Programmable Gain (1x, 10x, 200x)
   – Byte-oriented Two-wire Serial Interface
   – Dual Programmable Serial USARTs
   – Master/Slave SPI Serial Interface
   – Programmable Watchdog Timer with On-chip Oscillator
   – On-chip Analog Comparator
• Special Microcontroller Features
   – Power-on Reset and Programmable Brown-out Detection
   – Internal Calibrated RC Oscillator
   – External and Internal Interrupt Sources
   – Six Sleep Modes: Idle, ADC Noise Reduction,
      Power-save, Power-down, Standby and Extended
      Standby
   – Software Selectable Clock Frequency
   – ATmega103 Compatibility Mode Selected by a Fuse
   – Global Pull-up Disable
• I/O and Packages
   – 53 Programmable I/O Lines
   – 64-lead TQFP and 64-pad QFN/MLF
• Operating Voltages
   – 2.7 - 5.5V for ATmega64A
• Speed Grades
   – 0 - 16 MHz for ATmega64A