SL74HC112N 데이터시트 - System Logic Semiconductor
제조사

System Logic Semiconductor
The SL74HC112 is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs.
● Outputs Directly Interface to CMOS, NMOS, and TTL
● Operating Voltage Range: 2.0 to 6.0 V
● Low Input Current: 1.0 mA
● High Noise Immunity Characteristic of CMOS Devices
Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS
IK Semicon Co., Ltd
Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS
Integral Corp.
Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS
System Logic Semiconductor
Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS
Integral Corp.
Dual J-K Flip-Flop with Set and Reset High−Performance Silicon−Gate CMOS
ON Semiconductor
Dual “J-K” Flip-Flop with Set and Reset
Intersil
Dual J-K Flip-Flop with Set and Reset
Motorola => Freescale
Dual J-K Flip-Flop with Set and Reset
IK Semicon Co., Ltd
Dual J-K Flip-Flop with Set and Reset
ON Semiconductor
Dual “J-K” Flip-Flop with Set and Reset
Intersil