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SDA9489X 데이터시트 - Micronas

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SDA9489X

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102 Pages

File Size
2.2 MB

제조사
Micronas
Micronas 

General Description
SDA 9489X ’PIP IV Advanced’ and SDA 9589X ’SOPHISTICUS’ belong to a new generation of Picture-in-Picture (PiP) processors that combine high-quality digital PIP signal processing, digital multistandard color decoding and AD/DA conversion on a single chip. Both devices are equipped with CVBS and Y/C input interfaces. In addition the SDA SDA 9589X is also able to process YUV input signals for displaying high quality video signals e.g. coming from a DVD source.


FEATUREs
• Single chip solution:
   – AD-conversion for CVBS or Y/C or YUV1), multistandard color decoding, PLL for synchronization of inset channel, decimation filtering, embedded memory, RGBmatrix, DA-conversion, RGB/YUV switch, data-slicer and clock generation integrated on chip
• Analog inputs:
   – 3x CVBS or 1x CVBS and 1x Y/C or 1xYUV 1)alternatively
   – Clamping of each input
   – All ADCs with 8 bit amplitude resolution
   – Automatic Gain Control (AGC) for Y and CVBS
• Inset Synchronization:
   – Multiple time constants for reliable synchronization
   – Automatic recognition of 625 lines / 525 lines standard
• Color Decoder:
   – PAL-B/G, PAL-M, PAL-N(Argentina), PAL60, NTSC-M, NTSC4.4 and SECAM
   – Adjustable color saturation
   – Hue control for NTSC
   – Automatic Chroma Control (-24 dB ... +6 dB)
   – Automatic recognition of chroma standards: different search strategies selectable
   – Single crystal for all standards
   – IF-characteristic compensation filter
• Decimation:
   – PIP sizes between 1/81 and 1/4 adjustable with steps of 2 lines and 4 pixel
   – Resolution up to 324 luminance and 2x81 chrominance pixels per inset line
   – Horizontal and vertical filtering dependent on picture size
   – Automatic zoom in/out possible with three speeds
• Display Features:
   – 7 bit per pixel stored in memory
   – Field and joint-line free frame mode display (even at 100/120 Hz AABB with picture sizes<=1/9)
   – Two ’split-screen’ modes with horizontal decimation of 2 and vertical of 1.5 or 1.0
   – POP display
   – Up to 12 pictures of 1/36th size (11 still and 1 moving)
   – Up to 6 pictures of 1/16th size (5 still and 1 moving)
   – Up to 3 pictures of 1/9th size (2 still and 1 moving)
   – Display on VGA and SVGA screen (fH limited to 40kHz)
   – 8 different read frequencies for 16:9 compatibility
   – Line doubling mode for progressive scan applications
   – Freeze picture
   – Coarse positioning at 4 corners of the parent picture
   – Fine positioning at steps of 4 pixels and 2 lines
   – Wipe in / out programmable with 3 time periods
• Output signal processing:
   – 7 Bit DAC
   – RGB or YUV switch: insertion of an external source without PIP processing
   – Digital interpolation for anti-imaging
   – Adjustable transient improvement for luma (peaking)
   – Contrast, Brightness and Pedestal Level adjustable
   – Analog outputs: Y, +(B-Y), +(R-Y), or Y, -(B-Y), -(R-Y) or RGB
   – Three RGB matrices available: NTSC(Japan), NTSC(USA) or EBU
   – 64 different background colors and 4096 different frame colors
   – Plain or 3D frame with variable width and height
• Data Slicing:
   – Slicing of closed-caption (CC) or wide-screen-signaling (WSS) data
   – Violence blocking capability (V-chip)
   – Several filter for XDS data extraction
• On-screen display:
   – 64 characters programmable
   – 5 characters displayed in every PIP picture or 3 rows of 20 characters each
   – 4 different character luminance values or frame color
   – 4 background luminance values or (semi-) transparent mode
• I2C-Bus control (400 kHz)
• High stability clock generation
• PDSO 28-1 package (SMD)
• Full SDA 9488X and SDA 9588X backward compatibility
• SDA 9388X / SDA 9389X pinout compatibility
• 3.3V supply voltage (5V input capable)

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