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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크
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HCTS273D/SAMPLE 데이터시트 - Intersil

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HCTS273D/SAMPLE

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10 Pages

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280.7 kB

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Intersil
Intersil 

Description
The Intersil HCTS273MS is a Radiation Hardened octal D flip-flop, positive edge triggered, with reset.
The HCTS273MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS273MS is supplied in a 20 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).


FEATUREs
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s. 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
    - Bus Driver Outputs - 15 LSTTL Loads
• Military Temperature Range: -55°C to +125°C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
    - VIL = 0.8V Max
    - VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH

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