Overview
The H8S/2636, H8S/2638, H8S/2639, H8S/2630, H8S/2635, and H8S/2634 are microcomputers (MCUs: microcomputer units), built around the H8S/2600 CPU, employing Renesas Technology's proprietary architecture, and equipped with peripheral functions on-chip.

CPU
•General-register machine
 Sixteen 16-bit general registers (also usable as sixteen 8-bit registers or eight 32-bit registers)
• High-speed operation suitable for realtime control
 Maximum clock rate: 20 MHz
 High-speed arithmetic operations
      8/16/32-bit register-register add/subtract : 50 ns
      16 ×16-bit register-register multiply : 200 ns
      16 ×16 + 42-bit multiply and accumulate : 200 ns
      32 ÷ 16-bit register-register divide : 1000 ns
• Instruction set suitable for high-speed operation
Sixty-nine basic instructions
8/16/32-bit move/arithmetic and logic instructions
Unsigned/signed multiply and divide instructions
Multiply-and accumulate instruction
Powerful bit-manipulation instructions
• CPU operating modes
Advanced mode: 16-Mbyte address space

Bus controller
• Address space divided into 8 areas, with bus specifications settable independently for each area
• Choice of 8-bit or 16-bit access space for each area
• 2-state or 3-state access space can be designated for each area
• Number of program wait states can be set for each area
• Direct connection to burst ROM supported

PC break controller (This function is not implemented in the H8S/2635 Group)
• Supports debugging functions by means of PC break interrupts
• Two break channels

Data transfer controller (DTC) (This function is not implemented in the H8S/2635 Group)
• Can be activated by internal interrupt or software
• Multiple transfers or multiple types of transfer possible for one activation source
• Transfer possible in repeat mode, block transfer mode, etc.
• Request can be sent to CPU for interrupt that activated DTC

16-bit timer-pulse unit (TPU)
• 6-channel 16-bit timer on-chip
• Pulse I/O processing capability for up to 16 pins'
• Automatic 2-phase encoder count capability

Programmable pulse generator (PPG) (This function is not implemented in the H8S/2635 Group)
• Maximum 8-bit pulse output possible with TPU as time base
• Output trigger selectable in 4-bit groups
• Non-overlap margin can be set
• Direct output or inverse output setting possible Watchdog timer (WDT) 2 channels
• Watchdog timer or interval timer selectable
• Operation using sub-clock supported (WDT1 only)*

Motor control PWM timer (PWM)
• Maximum of 16 10-bit PWM outputs
• Eight outputs with two channels each built in
• Duty settable between 0% and 100%
• Automatic transfer of buffer register data supported
• Settable to any one of 5 operating speeds

Serial communication interface (SCI) 3 channels (SCI0 to SCI2)
• Asynchronous mode or synchronous mode selectable
• Multiprocessor communication function
• Smart card interface function

Controller area network (HCAN) 2 channels (The H8S/2635 Group has one HCAN channel)
• CAN: Ver. 2.0B compliant
• Buffer size: 15 transmit/receive messages, transmit only one message
• Filtering of receive messages

A/D converter • Resolution: 10 bits
• Input: 12 channels
• High-speed conversion: 13.3 µs minimum conversion time (at 20 MHz operation)
• Single or scan mode selectable
• Sample and hold circuit
• A/D conversion can be activated by external trigger or timer trigger

D/A converter (This function is not implemented in the H8S/2635 Group)
• Resolution: 8 bits
• Output: 2 channels