CP617 데이터시트 - Central Semiconductor
제조사
Central Semiconductor
PROCESS DETAILS
Process EPITAXIAL PLANAR
Die Size 16 x 16 MILS
Die Thickness 8.0 MILS
Base Bonding Pad Area 3.75 x 3.75 MILS
Emitter Bonding Pad Area 3.75 x 3.75 MILS
Top Side Metalization Al - 30,000Å
Back Side Metalization Au - 10,000Å
Small Signal Transistor PNP - Silicon RF Transistor Chip
Central Semiconductor
Small Signal Transistor PNP - Silicon RF Transistor Chip
Central Semiconductor
Small Signal Transistor PNP - Silicon RF Transistor Chip
Central Semiconductor
Small Signal Transistor NPN - Silicon RF Transistor Chip
Central Semiconductor
Small Signal Transistor NPN - Silicon RF Transistor Chip
Central Semiconductor Corp
Small Signal Transistor NPN - RF Transistor Chip ( Rev : 2002 )
Central Semiconductor
Small Signal Transistor NPN - RF Transistor Chip
Central Semiconductor
Small Signal Transistor NPN - RF Transistor Chip
Central Semiconductor Corp
Small Signal Transistor NPN - RF Transistor Chip
Central Semiconductor
Small Signal Transistor NPN - RF Transistor Chip
Central Semiconductor
