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AS7C33256PFS16A-150TQC 데이터시트 - Alliance Semiconductor

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AS7C33256PFS16A-150TQC

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11 Pages

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206.1 kB

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Alliance
Alliance Semiconductor 

Functional description
The AS7C33256PFS16A and AS7C33256PFS18A are high performance CMOS 4 Mbit synchronous Static Random Access Memory (SRAM) devices organized as 262,144 words × 16 or 18 bits and incorporate a pipeline for highest frequency on any given technology.


FEATUREs
• Organization: 262,144 words × 16 or 18 bits
• Fast clock speeds to 166 MHz in LVTTL/LVCMOS
• Fast clock to data access: 3.5/3.8/4.0/5.0 ns
• Fast OE access time: 3.5/3.8/4.0/5.0 ns
• Fully synchronous register-to-register operation
• “Flow-through” mode
• Single-cycle deselect
    - Dual-cycle deselect also available (AS7C33256PFD16A/AS7C33256PFD18A)
• Pentium®* compatible architecture and timing
• Asynchronous output enable control
• Economical 100-pin TQFP package
• Byte write enables
• Multiple chip enables for easy expansion
• 3.3V core power supply
• 2.5V or 3.3V I/O operation with separate VDDQ
• 30 mW typical standby power in power down mode
• NTD™* pipeline architecture available (AS7C33256NTD16A/AS7C33256NTD18A)

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