
STMicroelectronics
Introduction
The ZVS exploits the parasitic circuit elements to guarantee zero voltage across the switching device before turn on, eliminating hence any power losses due to the simultaneous overlap of switch current and voltage at each transition [1].
In order to allow the ZVS condition, the intrinsic body diode of the MOSFET has to conduct; in no or low load operation the extremely low reverse voltage, could be not sufficient to guarantee the reverse recovery charge sweep out before turning off the MOSFET. Hence, the body diode could be stressed by high dv/dt that latching the parasitic internal bipolar transistor brings the MOSFET to the failure.
In the market of power applications like telecom power supply, main frame computer-server, welding and steel cutting, the demand of power density is growing each year. Increasing power density means reducing component counts, power losses, heat-sink and reactive component size. The alternative to the hard switched full bridge, typical topology for these applications, was the phase-shifted zero voltage switching (ZVS) full bridge. This ZVS technique guarantees zero voltage across the switching device before turn on, eliminating hence any power losses due to the simultaneous overlap of switch current and voltage at each transition.
By this switching technique also at high frequencies, the switching losses are low; hence it allows the reduction of the components reactive size only. Obviously, by having lower losses lower heat-sink size is allowed. Furthermore, by avoiding the hard-switching condition the EMI/RFI noise is reduced.