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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크
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74LVC1G11GV-Q100H 데이터시트 - NXP Semiconductors.

74LVC1G11-Q100 image

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74LVC1G11GV-Q100H

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NXP
NXP Semiconductors. 

General description
The 74LVC1G11-Q100 provides a single 3-input AND gate.
The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.
Schmitt trigger action at all inputs makes the circuit highly tolerant to slower input rise and fall time.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.


FEATUREs and benefits
■ Automotive product qualification in accordance with AEC-Q100 (Grade 1)
   ◆ Specified from -40 °C to +85 °C and from -40 °C to +125 °C
■ Wide supply voltage range from 1.65 V to 5.5 V
■ 5 V tolerant inputs for interfacing with 5 V logic
■ High noise immunity
■ Complies with JEDEC standard:
   ◆ JESD8-7 (1.65 V to 1.95 V)
   ◆ JESD8-5 (2.3 V to 2.7 V)
   ◆ JESD8-B/JESD36 (2.7 V to 3.6 V)
■ 24 mA output drive (VCC = 3.0 V)
■ ESD protection:
   ◆ MIL-STD-883, method 3015 exceeds 2000 V
   ◆ HBM JESD22-A114F exceeds 2000 V
   ◆ MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
■ CMOS low power consumption
■ Latch-up performance exceeds 250 mA
■ Direct interface with TTL levels
■ Multiple package options

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