General Description
The 100ELT23 is a dual differential PECL to TTL translator operating from a single +5V supply.
The dual gate design of the 100ELT23 makes it ideal for applications which require the translation of a clock and a data signal.
The 100 series is temperature compensated.

FEATUREs
■ Typical propagation delay of 3.5 ns
■ TTL output drive: IOH = 24 mA; IOL = −3 mA
■ Flow through pinout
■ Q Output will default to a LOW with the inputs left Open
■ Internal pull-down resistors on inputs
■ Fairchild MSOP-8 package is a drop-in replacement to ON TSSOP-8
■ Typical ICCH of 23 mA, ICCL of 26 mA
■ Meets or exceeds JEDEC specification EIA/JESD78 IC latch-up test
■ Moisture Sensitivity Level TBD
■ ESD Performance:
    Human Body Model > TBD
    Machine Model > TBD