SI4465ADY(2007) 데이터 시트보기 (PDF) - Vishay Semiconductors

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SI4465ADY
(Rev.:2007)

P-Channel 1.8-V (G-S) MOSFET

Vishay Semiconductors 

SPICE Device Model Si4465ADY

Vishay Siliconix

P-Channel 1.8-V (G-S) MOSFET

CHARACTERISTICS

• P-Channel Vertical DMOS

• Macro Model (Subcircuit Model)

• Level 3 MOS

• Apply for both Linear and Switching Application

• Accurate over the −55 to 125°C Temperature Range

• Model the Gate Charge, Transient, and Diode Reverse Recovery

Characteristics

DESCRIPTION

The attached spice model describes the typical electrical

characteristics of the p-channel vertical DMOS. The subcircuit

model is extracted and optimized over the −55 to 125°C

temperature ranges under the pulsed 0-V to 5-V gate drive. The

saturated output impedance is best fit at the gate bias near the

threshold voltage.

A novel gate-to-drain feedback capacitance network is used to model

the gate charge characteristics while avoiding convergence difficulties

of the switched Cgd model. All model parameter values are optimized

to provide a best fit to the measured electrical data and are not

intended as an exact physical interpretation of the device.

SUBCIRCUIT MODEL SCHEMATIC

This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate

data sheet of the same number for guaranteed specification limits.

Document Number: 74212

S-61686Rev. A, 01-Jan-07

www.vishay.com

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