ADG1311(Rev0) 데이터 시트보기 (PDF) - Analog Devices

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ADG1311
(Rev.:Rev0)

±15 V/12 V Quad SPST Switches

Analog Devices 

ADG1311/ADG1312/ADG1313

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

1

IN1

2

D1

3

S1

4

VSS

5

GND

6

S4

7

D4

8

IN4

9

IN3

10

D3

11

S3

12

NC

13

VDD

14

S2

15

D2

16

IN2

IN1 1

D1 2

S1 3

VSS 4

GND 5

S4 6

D4 7

IN4 8

ADG1311/

ADG1312/

ADG1313

TOP VIEW

16 IN2

15 D2

14 S2

13 VDD

12 NC

11 S3

10 D3

9 IN3

NC = NO CONNECT

Figure 2. SOIC/TSSOP Pin Configuration

Description

Logic Control Input.

Drain Terminal. Can be an input or output.

Source Terminal. Can be an input or output.

Most Negative Power Supply Potential.

Ground (0 V) Reference.

Source Terminal. Can be an input or output.

Drain Terminal. Can be an input or output.

Logic Control Input.

Logic Control Input.

Drain Terminal. Can be an input or output.

Source Terminal. Can be an input or output.

No Connection.

Most Positive Power Supply Potential.

Source Terminal. Can be an input or output.

Drain Terminal. Can be an input or output.

Logic Control Input.

Rev. 0 | Page 6 of 12

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