74LVC74APW-Q100 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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74LVC74APW-Q100

Dual D-type flip-flop with set and reset; positive-edge trigger

Nexperia B.V. All rights reserved 

Nexperia

74LVC74A-Q100

Dual D-type flip-flop with set and reset; positive-edge trigger

5.2 Pin description

Table 2. Pin description

Symbol

Pin

1RD, 2RD

1, 13

1D, 2D

2, 12

1CP, 2CP

3, 11

1SD, 2SD

4, 10

1Q, 2Q

5, 9

1Q, 2Q

6, 8

GND

7

VCC

14

Description

asynchronous reset-direct input (active LOW)

data input

clock input (LOW-to-HIGH, edge-triggered)

asynchronous set-direct input (active LOW)

true output

complement output

ground (0 V)

supply voltage

6. Functional description

Table 3. Function table[1]

Input

nSD

nRD

nCP

nD

L

H

X

X

H

L

X

X

L

L

X

X

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care

Output

nQ

nQ

H

L

L

H

H

H

Table 4. Function table[1]

Input

nSD

nRD

nCP

nD

H

H



L

H

H



H

Output

nQn+1

L

H

nQn+1

H

L

[1] H = HIGH voltage level; L = LOW voltage level;  = LOW-to-HIGH transition; Qn+1 = state after the next LOW-to-HIGH CP transition;

X = don’t care

74LVC74A_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 5 April 2013

© Nexperia B.V. 2017. All rights reserved

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