ISL97671AIRZ-EVALZ 데이터 시트보기 (PDF) - Renesas Electronics
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ISL97671AIRZ-EVALZ
Renesas Electronics
ISL97671AIRZ-EVALZ Datasheet PDF : 28 Pages
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ISL97671A
Electrical Specifications VIN = 12V, EN = 5V, RSET = 20.1kΩ, unless otherwise noted. Boldface limits apply across the operating
temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
CONDITION
MIN
(Note 8) TYP
MAX
(Note 8) UNIT
FAULT PIN
Fault Pull-down Current
Fault Clamp Voltage with Respect to VIN
LX Start-up Threshold
IFAULT
VFAULT
LXstart_thres
VIN = 12V
VIN = 12, VIN - VFAULT
12
21
6
7
0.9
30
µA
8.3
V
1.2
V
LX Start-up Current
ILXStart-up
1
3.5
5
mA
SMBus/I2C INTERFACE
Guaranteed Range for Data, Clock Input Low
VIL
Voltage
0.8
V
Guaranteed Range for Data, Clock Input High
Voltage
SMBus/I2C Data line Logic Low Voltage
Input Leakage On SMBData/SMBClk
SMBus/I2C TIMING SPECIFICATIONS
VIH
VOL
ILEAK
IPULLUP = 4mA
Measured at 4.8V
1.5
VDD V
0.17 V
-10
10
µA
Minimum Time Between EN high and
tEN-SMB/I2C 1µF capacitor on VDC
2
ms
SMBus/I2C Enabled
Pulse Width Suppression on SMBCLK/SMBDAT
PWS
0.15
0.45 µs
SMBus/I2C Clock Frequency
fSMB
Bus Free Time Between Stop and Start
tBUF
Condition
400 kHz
1.3
µs
Hold Time After (Repeated) START Condition.
After this Period, the First Clock is Generated
tHD:STA
0.6
µs
Repeated Start Condition Setup Time
tSU:STA
0.6
µs
Stop Condition Setup Time
tSU:STO
0.6
µs
Data Hold Time
tHD:DAT
300
ns
Data Setup Time
tSU:DAT
100
ns
Clock Low Period
tLOW
1.3
µs
Clock High Period
tHIGH
0.6
µs
Clock/data Fall Time
tF
300 ns
Clock/data Rise Time
tR
300 ns
NOTES:
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
9. At maximum VIN of 26.5V, minimum VOUT is limited 28V.
10. Varies within range specified by VHEADROOM_RANGE.
FN7709 Rev.4.00
Sep 14, 2017
Page 7 of 28
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