ISL95871C 데이터 시트보기 (PDF) - Renesas Electronics

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ISL95871C

SMBus Interfaced Battery Charger with Internal FETs

Renesas Electronics 

ISL95871C

SMBus Transactions

All transactions start with a control byte sent from the SMBus

master device. The control byte begins with a Start condition,

followed by 7-bits of slave address (0001001 for the ISL95871C)

followed by the R/W bit. The R/W bit is 0 for a write or 1 for a read. If

any slave devices on the SMBus bus recognize their address, they

will Acknowledge by pulling the serial data (SDA) line low for the last

clock cycle in the control byte. If no slaves exist at that address or

are not ready to communicate, the data line will be 1, indicating a

Not Acknowledge condition.

Once the control byte is sent, and the ISL95871C acknowledges

it, the 2nd byte sent by the master must be a register address

byte such as 0x14 for the ChargeCurrent register. The register

address byte tells the ISL95871C which register the master will

write or read. See Table 1 for details of the registers. Once the

ISL95871C receives a register address byte it responds with an

acknowledge.

Byte Format

Every byte put on the SDA line must be eight bits long and must

be followed by an acknowledge bit. Data is transferred with the

most significant bit first (MSB) and the least significant bit last

(LSB).

ISL95871C and SMBus

The ISL95871C receives control inputs from the SMBus interface.

The serial interface complies with the SMBus protocols as

documented in the System Management Bus Specification V1.1,

which can be downloaded from www.smbus.org. The ISL95871C

uses the SMBus Read-Word and Write-Word protocols (see Figure

25) to communicate with the smart battery. The ISL95871C is an

SMBus slave device and does not initiate communication on the

bus. It responds to the addresses in the following.

Read address = 0b00010011 (0X13) and

Write address = 0b00010010 (0X12).

In addition, the ISL95871C has two identification (ID) registers: a

16-bit device ID register and a 16-bit manufacturer ID register.

The data (SDA) and clock (SCL) pins have Schmitt-trigger inputs

that can accommodate slow edges. Choose pull-up resistors for

SDA and SCL to achieve rise times according to the SMBus

specifications. The ISL95871C is controlled by the data written to

the registers described in Table 1.

Battery Charger Registers

The ISL95871C supports five battery-charger registers that use

either Write-Word or Read-Word protocols, as summarized in

Table 1. ManufacturerID and DeviceID are “read only” registers

and can be used to identify the ISL95871C. On the ISL95871C,

ManufacturerID always returns 0x0049 (ASCII code for “I” for

Intersil) and DeviceID always returns 0x0001.

Enabling and Disabling Charging

After applying power to ISL95871C, the internal registers contain

their POR values (see Table 1). The POR values for charge current

and charge voltage are 0x0000. These values disable charging.

To enable charging, the ChargeCurrent register must be written

with a number >0x007F and the ChargeVoltage register must be

written with a number >0x000F. Charging can be disabled by

writing 0x0000 to either of these registers.

REGISTER

ADDRESS

0x14

0x15

0x3F

0xFE

0xFF

TABLE 1. BATTERY CHARGER REGISTER SUMMARY

REGISTER NAME

ChargeCurrent

ChargeVoltage

InputCurrent

ManufacturerID

DeviceID

READ/WRITE

Read or Write

Read or Write

Read or Write

Read Only

Read Only

DESCRIPTION

6-bit Charge Current Setting

11-bit Charge Voltage Setting

6-bit Charge Current Setting

Manufacturer ID

Device ID

POR STATE

0x0000

0x0000

0x0080

0x0049

0x0001

FN6856 Rev 2.00

June 8, 2011

Page 14 of 26

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