ICS87004I 데이터 시트보기 (PDF) - Integrated Device Technology
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ICS87004I Datasheet PDF : 15 Pages
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ICS87004I Data Sheet
Parameter Measurement Information
1.65V±5%
VDD,
VDDA,
VDDO
LVCMOS
GND
-1.65V±5%
3.3V Output Load AC Test Circuit
SCOPE
Qx
1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR
1.25V±5%
VDD,
VDDA,
VDDO LVCMOS
GND
-1.25V±5%
2.5V Output Load AC Test Circuit
SCOPE
Qx
VDD
nCLK[0:1]
V
PP
CLK[0:1]
GND
Cross Points
V
CMR
Differential Input Level
V
DDO
Qx
2
V
DDO
Qy
2
t sk(o)
Output Skew
Q[0:3]
V
DDO
2
V
DDO
2
tcycle n
➤
tcycle n+1
| | tjit(cc) = tcycle n – tcycle n+1
1000 Cycles
V
DDO
2
➤
Cycle-to-Cycle Jitter
nCLK[0:1]
VOH
CLK[0:1]
VOL
FB_IN
➤ t(Ø)
VOH
VDDO
2
VOL
t(Ø) mean = Static Phase Offset
Where t(Ø) is any random sample, and t(Ø) mean is the average
of the sampled cycles measured on the controlled edges.
Phase Jitter and Static Phase Offset
ICS87004AGI REVISION D JANUARY 4, 2010
8
©2009 Integrated Device Technology, Inc.
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