74VHCT573A 데이터 시트보기 (PDF) - ON Semiconductor

부품명

상세내역

제조사

74VHCT573A

Octal D-Type Latch with 3-STATE Outputs

ON Semiconductor 

AC Electrical Characteristics

Symbol

tPLH, tPHL

tPLH, tPHL

tPZL, tPZH

tPLZ, tPHZ

tOSLH, tOSHL

CIN

COUT

CPD

Parameter

Propagation Delay

Time (LE to On)

Propagation Delay

Time (D to On)

3-STATE Output

Enable Time

3-STATE Output

Disable Time

Output to Output

Skew

Input Capacitance

Output Capacitance

Power Dissipation

Capacitance

VCC (V)

5.0 ± 0.5

5.0 ± 0.5

5.0 ± 0.5

5.0 ± 0.5

5.0 ± 0.5

Conditions

RL = 1kΩ

RL = 1kΩ

CL = 15pF

CL = 50pF

CL = 15pF

CL = 50pF

CL = 15pF

CL = 50pF

CL = 50pF

(7)

VCC = Open

VCC = 5.0V

(8)

TA = +25°C

Min. Typ. Max.

7.7 12.3

8.5 13.3

5.1 8.5

5.9 9.5

6.3 10.9

7.1 11.9

8.8 11.2

1.0

4 10

6

25

TA = –40°C

to +85°C

Min. Max.

1.0 13.5

1.0 14.5

1.0 9.5

1.0 10.5

1.0 12.5

1.0 13.5

1.0 12.0

1.0

10

Units

ns

ns

ns

ns

ns

pF

pF

pF

Notes:

7. Parameter guaranteed by design. tOSLH = |tPLH max – tPLH min|; tOSHL = |tPHL max – tPHL min|

8. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating

current consumption without load. Average operating current can be obtained by the equation:

ICC (Opr.) = CPD • VCC • fIN + ICC / 8 (per F/F). The total CPD when n pcs. of the Latch operates can be

calculated by the equation: CPD(total) = 14 + 13n.

AC Operating Requirements

Symbol

Parameter

tW(H)

tS

tH

Minimum Pulse Width (LE)

Minimum Set-Up Time

Minimum Hold Time

VCC (V)

5.0 ± 0.5

5.0 ± 0.5

5.0 ± 0.5

TA = +25°C

Min. Typ. Max.

6.5

1.5

3.5

TA = –40°C to +85°C

Min.

Max.

8.5

1.5

3.5

Units

ns

ns

ns

©1997 Fairchild Semiconductor Corporation

74VHCT573A Rev. 1.3

5

www.fairchildsemi.com

Share Link: