Freescale Semiconductor, Inc.
SINE WAVE
GENERATOR
50 Ω
50 Ω PAD
DC
BLOCK
OUTPUT A
fin
DEVICE
UNDER
TEST
fin
GND V+ GNDi V+i
TEST
POINT
(fv)
NOTE: Alternately, the 50 Ω pad may be a T network.
Figure 7. Test Circuit
SINE WAVE
GENERATOR
50 Ω
50 Ω*
0.01 µF
Vin
REFin
OUTPUT A
DEVICE
UNDER
TEST
REFout
TEST
POINT
(fR)
TEST
POINT
GND V+ GNDi V+i
* Characteristic Impedance
Figure 8. Test Circuit — Reference Mode
C1
C2
REFin
OUTPUT A
REFout
DEVICE
UNDER
TEST
GND V+ GNDi V+i
TEST
POINT
(fR)
REFout
1 / f out
50%
Figure 9. Test Circuit — Crystal Mode
OUTPUT
tw
50%
Figure 11. Switching Waveform
Figure 10. Switching Waveform
DEVICE
UNDER
TEST
TEST POINT
CL*
* Includes all probe and fixture capacitance.
Figure 12. Test Circuit
MOTOROLA WIRELESS SEMICONDUCTOR
SOLUTIONS DEVICE DATA For More Information On This Product,
Go to: www.freescale.com
MC145220
7