Freescale Semiconductor, Inc.
LOOP SPECIFICATIONS (V+ = V+i = 2.7 to 5.5 V unless otherwise indicated, GND = GNDi, TA = – 40 to 85°C)
Guaranteed
Operating Range
Symbol
Parameter
Test Condition
Min
Max Unit
Pin Input Sensitivity Range, fin or fini (Figure 7)
40 MHz ≤ frequency < 300 MHz
300 MHz ≤ frequency < 700 MHz
700 MHz ≤ frequency < 1100 MHz
–2
8
dBm*
–5
6
– 16
4
∆Pin
—
fref
Difference Allowed Between fin and fini
Isolation Between fin and fini
Input Frequency, REFin Externally Driven in
Reference Mode (Figure 8)
fXTAL Crystal Frequency, Crystal Mode (Figure 9)
15
Vin ≥ 400 mV p–p, R Counter set to divide
ratio such that fR ≤ 1 MHz, REF Counter set
to divide ratio such that REFout ≤ 5 MHz
4
C1 ≤ 30 pF, C2 ≤ 30 pF, Includes Stray
Capacitance; R Counter and REF Counter
same as above
V+ = 2.7 V 2
V+ = 3.5 V 2
V+ = 4.5 V 2
V+ = 5.5 V 2
10
dB
dB
27
MHz
MHz
10
13
15
15
fout Output Frequency, REFout (Figures 10 and 12)
f
Operating Frequency of the Phase Detectors
CL = 25 pF
dc
5
MHz
dc
1
MHz
tw
Output Pulse Width, φR, φV, φRi, φVi
(Figures 11 and 12)
fR in Phase with fV, CL = 25 pF
16
125
ns
Cin Input Capacitance, REFin
* Power level at the input to the dc block.
—
5
pF
MC145220
6
MOTOROLA WIRELESS SEMICONDUCTOR
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