PUMD10,125 데이터 시트보기 (PDF) - NXP Semiconductors.
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PUMD10,125 Datasheet PDF : 17 Pages
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NXP Semiconductors
PEMD10; PUMD10
NPN/PNP resistor-equipped transistors; R1 = 2.2 k, R2 = 47 k
5. Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Per transistor; for the PNP transistor (TR2) with negative polarity
VCBO
collector-base voltage
open emitter
-
VCEO
collector-emitter voltage open base
-
VEBO
emitter-base voltage
open collector
-
VI
input voltage TR1
positive
-
negative
-
input voltage TR2
positive
-
negative
-
IO
output current
-
ICM
peak collector current
-
Ptot
total power dissipation
Tamb 25 C
[1]
PEMD10 (SOT666)
[2] -
PUMD10 (SOT363)
-
Per device
Ptot
total power dissipation
Tamb 25 C
[1]
PEMD10 (SOT666)
[2] -
PUMD10 (SOT363)
-
Tj
junction temperature
-
Tamb
ambient temperature
65
Tstg
storage temperature
65
Max Unit
50
V
50
V
5
V
+12
V
5
V
+5
V
12
V
100
mA
100
mA
200
mW
200
mW
300
mW
300
mW
150
C
+150 C
+150 C
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2] Reflow soldering is the only recommended soldering method.
PEMD10_PUMD10
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 4 January 2012
© NXP B.V. 2012. All rights reserved.
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