79R3041-25J(2008) 데이터 시트보기 (PDF) - Integrated Device Technology

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79R3041-25J
(Rev.:2008)

INTEGRATED RISController™ FOR LOW-COST SYSTEMS

Integrated Device Technology 

IDT79R3041 INTEGRATED RISController FOR LOW COST SYSTEMS

COMMERCIAL TEMPERATURE RANGE

AC ELECTRICAL CHARACTERISTICS RV3041 (CONT.)

16.67 MHz

20 MHz

25MHz

33MHz

Symbol

Signals

t18

A/D

t19

A/D

Description

Tri-state from SysClk

SysClk to data out

Min. Max. Min. Max. Min. Max. Min. Max. Unit

—

13

—

10 —

10

— 10 ns

—

16

—

13 —

12

— 12 ns

t20

ClkIn

Pulse Width High

12

—

10

—

8

— 6.5 — ns

t21

ClkIn

Pulse Width Low

12

—

10

—

8

— 6.5 — ns

t22

ClkIn

Clock Period

30

250

25 250 20 250 15 250 ns

t23 Reset

Pulse Width from Vcc valid

200

—

200 — 200 — 200 — µs

t24 Reset

Minimum Pulse Width

32

—

32

— 32

—

32 — sys

t25 Reset

Set-up to SysClk falling

8

—

6

—

5

—

5 — ns

t26

Int

Mode set-up to Reset rising

8

—

6

—

5

—

5 — ns

t27

Int

Mode hold from Reset rising 2.5

—

2.5 — 2.5 — 2.5 — ns

t28

SInt, SBrCond Set-up to SysClk falling

8

—

6

—

5

—

5 — ns

t29

SInt, SBrCond Hold from SysClk falling

4

—

3

—

3

—

3 — ns

t30

Int, BrCond

Set-up to SysClk falling

8

—

6

—

5

—

5 — ns

t31

Int, BrCond

Hold from SysClk falling

4

—

3

—

3

—

3 — ns

tsys SysClk

Pulse Width

2*t22 2*t22 2*t22 2*t22 2*t22 2*t22 2*t22 2*t22 ns

t32 SysClk

Clock High Time

t22 - 2 t22 + 2 t22 - 2 t22 + 2 t22 - 2 t22 + 2 t22 - 2 t22 + 2 ns

t33 SysClk

Clock Low Time

t22 - 2 t22 + 2 t22 - 2 t22 + 2 t22 - 2 t22 + 2 t22 - 2 t22 + 2 ns

t45 ExtDataEn

Tri-state from SysClk rising

—

13

—

10 —

10

— 10 ns

(after driven condition)

t46 ExtDataEn

Driven from SysClk falling

—

13

—

10 —

10

— 10 ns

(after driven condition)

t47 IOStrobe

Valid from SysClk falling

—

10

—

8—

7

— 7 ns

t48 ExtDataEn,

Asserted from SysClk rising

—

15

—

12 —

9

— 9 ns

t49 ExtDataEn

DataEn

Negated from SysClk rising

—

9

—

7—

6

— 6 ns

t50 MemStrobe

Asserted from SysClk rising

—

19

—

15 —

15

— 15 ns

t51 MemStrobe

Negated from SysClk falling

—

19

—

15 —

15

— 15 ns

t52 MemStrobe

Asserted from Addr(3:0) valid(4) 0

—

0

—0

—

0 — ns

tderate All outputs

Timing deration for loading

—

0.5

— 0.5 — 0.5 — 0.5 ns/

over 25pF(4, 5)

25pF

NOTES:

2905 tbl 12

1. All timings referenced to 1.5 Volts, with a rise and fall time of less than 2.5ns.

2. All outputs tested with 25pF loading.

3. The AC values listed here reference timing diagrams contained in the R3041 Hardware User's Manual.

4. Guaranteed by design.

5. This parameter is used to derate the AC timings according to the loading of the system. This parameter provides a deration for loads over the specified

test condition; that is, the deration factor is applied for each 25pF over the specified test load condition.

6. Timings t34 - t44 are reserved for other RISController family members.

18

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