
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
D1, D2
CK1, CK2
CLR1, CLR2
PR1, PR2
Q1, Q1, Q2, Q2
Description
Data Inputs
Clock Pulse Inputs
Direct Clear Inputs
Direct Preset Inputs
Outputs
Truth Table
Inputs
Outputs
CLR PR D CK Q Q Function
L
HX X
L H Clear
H L X X H L Preset
L
LX
X
HH
H HL
LH
H HH
HL
H HX
Qn Qn No Change
©2008 Fairchild Semiconductor Corporation
74VHCT74A Rev. 1.4.0
2
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