CY7C1061DV33(2006) 데이터 시트보기 (PDF) - Cypress Semiconductor

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CY7C1061DV33
(Rev.:2006)

16-Mbit (1M x 16) Static RAM

Cypress Semiconductor 

PRELIMINARY

Data Retention Characteristics (Over the Operating Range)

Parameter

Description

Conditions

VDR

ICCDR

tCDR[3]

tR[11]

VCC for Data Retention

Data Retention Current

VCC = 2V , CE1 > VCC – 0.2V,

CE2 < 0.2V, VIN > VCC – 0.2V or

VIN < 0.2V

Chip Deselect to Data Retention Time

Operation Recovery Time

Data Retention Waveform

CY7C1061DV33

Min. Typ. Max. Unit

2

V

25

mA

0

ns

tRC

ns

DATA RETENTION MODE

VCC

3.0V

VDR > 2V

3.0V

tCDR

tR

CE

]

Switching Waveforms

Read Cycle No. 1[12,13]

tRC

ADDRESS

DATA OUT

tAA

tOHA

PREVIOUS DATA VALID

Notes:

11. Full device operation requires linear VCC ramp from VDR to VCC(min.) > 50 µs or stable at VCC(min.) > 50 µs

12. Device is continuously selected. OE, CE, BHE and/or BHE = VIL. CE2 = VIH.

13. WE is HIGH for Read cycle.

DATA VALID

Document #: 38-05476 Rev. *C

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