MT90863(2000) 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc
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MT90863 Datasheet PDF : 35 Pages
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MT90863 Advance Information
Read/Write Address:
Reset value:
0CH for ABR register,
0000H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
CDA RS
WS CA6 CA5 CA4 CA3 CA2 CA1 CA0 SA4 SA3 SA2 SA1 SA0
Bit
15
14
13
12
11 - 5
4-0
Name
Description
unused
Reserved
CDA
Complete Data Access. This bit is read only. This bit changes from 0 to 1
when data transfer is completed between memory and the data read register or
data write register. When the RS or WS bit in this register is changed from 1 to
0, this bit is reset to zero.
RS
Read Select. A zero to one transition of this bit initiates the data transfer from
memory to the data read register. This bit is reset to zero when the CDA bit
changes from 0 to 1.
WS
Write Select. A zero to one transition of this bit initiates the data transfer from
the data write register to memory. This bit is reset to zero when the CDA bit
changes from 0 to 1.
CA6 - CA0
Channel Address Bits. These bits perform the same function as the external
address bits when used to access various memory locations. The number
(expressed in binary notation) on these bits refers to the input or output data
stream channel that corresponds to the subsection of memory.
SA4 - SA0
Stream Address Bits. These bits perform the same function as the STA bits in
the control register. The number (in binary notation) on these bits refers to the
input or output data stream which corresponds to the subsection of memory.
Table 13 -. Address Buffer (ABR) Register Bits
Read/Write Address:
Reset value:
0DH for DWR register,
0000H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
WR15 WR14 WR13 WR12 WR11 WR10 WR9 WR8 WR7 WR6 WR5 WR4 WR3 WR2 WR1 WR0
Bit
Name
Description
15 - 0
WR15 - WR0 Write Data Bits. Data to be transferred to the internal memory locations.
.Table 14 - Data Write (DWR) Register Bits
Read Address:
Reset value:
0EH for DRR register,
0000H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RD15 RD14 RD13 RD12 RD11 RD10 RD9 RD8 RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0
Bit
15 - 0
Name
RD15 - RD0
Description
Read Data Bits. Data transferred from one of the internal memory locations.
Table 15 -. Data Read (DRR) Register Bits
20
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