XRT83L38
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.0
SIGNAL NAME
TAOS_0
TAOS_1
TAOS_2
TAOS_3
TAOS_4
TAOS_5
TAOS_6
TAOS_7
TXON_0
TXON_1
TXON_2
TXON_3
TXON_4
TXON_5
TXON_6
TXON_7
TQFP
PIN #
195
196
197
198
63
64
65
66
169
170
171
172
90
91
92
93
BGA
LEAD #
TYPE
DESCRIPTION
D6
I Transmit All Ones for Channel _0 - Hardware mode
Setting this pin “High” enables the transmission of an “All Ones” Pattern
from Channel _0. A “Low” level stops the transmission of the “All Ones”
Pattern.
B6
Transmit All Ones for Channel _1
A5
Transmit All Ones for Channel _2
C6
Transmit All Ones for Channel _3
T6
Transmit All Ones for Channel _4
U6
Transmit All Ones for Channel _5
V6
Transmit All Ones for Channel _6
R6
Transmit All Ones for Channel _7
NOTE: Internally pulled “Low” with a 50kΩ resistor for all channels.
A13
I Transmitter Turn On for Channel _0
Hardware mode
Setting this pin "High" turns on the Transmit and Receive Sections of Chan-
nel _0. When TXON_0 = “0” then TTIP_0 and TRING_0 driver outputs will
be tri-stated.
In Host mode
The TXON_n bits in the channel control registers turn each channel Trans-
mit and Receive section ON or OFF. However, control of the on/off function
can be transferred to the Hardware pins by setting the TXONCNTL bit (bit
7) to “1” in the register at address hex 0x82.
Transmitter Turn On for Channel _1
Transmitter Turn On for Channel _2
Transmitter Turn On for Channel _3
Transmitter Turn On for Channel _4
D12
Transmitter Turn On for Channel _5
C12
Transmitter Turn On for Channel _6
B12
Transmitter Turn On for Channel _7
V13
NOTE: Internally pulled “Low” with a 50kΩ resistor for all channels.
U13
R12
R13
10