74V2T32 데이터 시트보기 (PDF) - STMicroelectronics

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74V2T32

DUAL 2-INPUT OR GATE

STMicroelectronics 

74V2T32

s HIGH SPEED: tPD = 4.6ns (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 1µA(MAX.) at TA=25°C

s COMPATIBLE WITH TTL OUTPUTS:

VIH = 2V (MIN), VIL = 0.8V (MAX)

s POWER DOWN PROTECTION ON INPUTS

SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC(OPR) = 4.5V to 5.5V

s IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74V2T32 is an advanced high-speed CMOS

DUAL 2-INPUT OR GATE fabricated with

sub-micron silicon gate and double-layer metal

wiring C2MOS tecnology.

The internal circuit is composed of 3 stages

including buffer output, which provide high noise

immunity and stable output.

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage.

This device can be used to interface 5V to 3V

systems and it is ideal for portable applications

DUAL 2-INPUT OR GATE

PRELIMINARY DATA

SOT 23-8L

SOT 323-8L

ORDER CODES

PACKAGE

SOT23-8L

SOT323-8L

T&R

74V2T08STR

74V2T08CTR

like personal digital assistant and all

battery-powered equipment.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them ESD immunity and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

December 2001

1/9

This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.

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