M25P16-VME3TGBA 데이터 시트보기 (PDF) - Micron Technology

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M25P16-VME3TGBA

Micron M25P16 Serial Flash Embedded Memory

Micron Technology 

Micron M25P16 Serial Flash Embedded Memory

Operating Features

To enter the hold condition, the device must be selected, with S# LOW. The hold condi-

tion starts on the falling edge of the HOLD# signal, if this coincides with serial clock (C)

being LOW. The hold condition ends on the rising edge of the HOLD# signal, if this co-

incides with C being LOW. If the falling edge does not coincide with C being LOW, the

hold condition starts after C next goes LOW. Similarly, if the rising edge does not coin-

cide with C being LOW, the hold condition ends after C next goes LOW.

During the hold condition, DQ1 is HIGH impedance while DQ0 and C are Don’t Care.

Typically, the device remains selected with S# driven LOW for the duration of the hold

condition. This ensures that the state of the internal logic remains unchanged from the

moment of entering the hold condition. If S# goes HIGH while the device is in the hold

condition, the internal logic of the device is reset. To restart communication with the

device, it is necessary to drive HOLD# HIGH, and then to drive S# LOW. This prevents

the device from going back to the hold condition.

Figure 6: Hold Condition Activation

C

HOLD#

HOLD condition (standard use)

HOLD condition (nonstandard use)

PDF: 09005aef8456656c

m25p16.pdf - Rev. J 1/18 EN

16

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