
M54/M74HC76
TRUTH TABLE
INPUTS
CLR
PR
J
K
L
H
X
X
H
L
X
X
L
L
X
X
H
H
L
L
H
H
L
H
H
H
H
L
H
H
H
H
H
H
X
X
X: Don’t Care
OUTPUTS
CK
Q
Q
X
L
H
X
H
L
X
H
H
Qn
Qn
L
H
H
L
Qn
Qn
Qn
Qn
PIN DESCRIPTION
PIN No
1, 6
2, 7
3, 8
4, 9
10, 14
11, 15
16, 12
5
13
SYMBOL
1CK, 2CK
1PR, 2PR
1CLR,
2CLR
1J, 2J
1Q, 2Q
1Q, 2Q
1K, 2K
GND
VCC
NAME AND FUNCTION
Clock Input (HIGH to
LOW edge triggered)
Set Inputs (Active LOW)
Asynchronous Reset
Inputs (Active LOW)
Data Inputs: Flip-Flop 1
and 2
Complement Flip-Flop
Outputs
True Flip-Flop Outputs
Data Inputs: Flip-Flop 1
and 2
Ground (0V)
Positive Supply Voltage
IEC LOGIC SYMBOL
LOGIC DIAGRAM (1/2 Package)
FUNCTION
CLEAR
PRESET
NO CHANGE
TOGGLE
NO CHANGE
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