Philips Semiconductors
N-channel dual-gate PoLo MOS-FETs
Product specification
BF1201; BF1201R;
BF1201WR
102
handbook, halfpage
Yis
(mS)
10
1
MCD947
bis
gis
103
handbook, halfpage
yrs
(µS)
102
10
MCD948 −103
ϕrs
(deg)
ϕrs
−102
yrs
−10
10−1
10
102
103
f (MHz)
VDS = 5 V; VG2 = 4 V.
ID = 15 mA; Tamb = 25 °C.
Fig.17 Input admittance as a function of frequency;
typical values.
1
10
−1
102
103
f (MHz)
VDS = 5 V; VG2 = 4 V.
ID = 15 mA; Tamb = 25 °C.
Fig.18 Reverse transfer admittance and phase as
a function of frequency; typical values.
102
handbook, halfpage
yfs
(mS)
10
1
10
MCD949 −102
10
handbook, halfpage
ϕfs
Yos
(deg)
(mS)
yfs
1
ϕfs
−10
10−1
−1
102
103
f (MHz)
10−2
10
MCD950
bos
gos
102
103
f (MHz)
VDS = 5 V; VG2 = 4 V.
ID = 15 mA; Tamb = 25 °C.
Fig.19 Forward transfer admittance and phase as
a function of frequency; typical values.
VDS = 5 V; VG2 = 4 V.
ID = 15 mA; Tamb = 25 °C.
Fig.20 Output admittance as a function of
frequency; typical values.
2000 Mar 29
8